Semiconductor Policy, Electronics & India Semiconductor Mission

What is a Semiconductor?

A semiconductor is a material that has electrical conductivity between that of a conductor (like copper) and an insulator (like glass). The most common semiconductor material is silicon (Si) — the second most abundant element in Earth's crust.

Key properties:

• Conductivity can be precisely controlled by adding impurities (doping) — a process called doping introduces atoms (boron for p-type, phosphorous for n-type)
• Semiconductors form the basis of transistors, the fundamental building block of all modern electronics
• A silicon wafer is a thin disc of crystalline silicon on which integrated circuits (chips) are fabricated

Integrated Circuits and Moore's Law

An integrated circuit (IC) or chip combines millions (now billions) of transistors onto a single piece of silicon. The number of transistors that can be packed into a chip determines its processing power.

Moore's Law (Gordon Moore, Intel co-founder, 1965): The number of transistors on an integrated circuit doubles approximately every two years, while the cost per transistor halves. This has driven exponential growth in computing power and the digital economy.

Modern chips contain billions of transistors on a fingernail-sized piece of silicon:

• Apple M3 chip (2023): ~25 billion transistors
• NVIDIA H100 GPU (AI): ~80 billion transistors on TSMC 4nm process

As physical limits approach (individual atoms), Moore's Law is slowing — innovation has shifted to 3D stacking (chiplets), advanced packaging, and specialised architectures.

Global Semiconductor Supply Chain

The semiconductor supply chain is the most geographically concentrated and technically complex industrial chain in the world. It has three distinct phases:

Phase 1: Design (Fabless Model)

Companies that only design chips, outsourcing fabrication:

• USA dominance: Qualcomm, Nvidia, AMD, Apple, Broadcom, Intel, Texas Instruments
• Chip design requires Electronic Design Automation (EDA) software — dominated by Synopsys and Cadence (both US companies)
• USA controls EDA tools and intellectual property (IP) cores — a critical leverage point in the US-China tech war

Phase 2: Fabrication (Fabs)

Foundries that manufacture chips to client specifications. Requires billions in capital investment and extreme precision (cleanrooms, electron beam lithography):

TSMC's dominance: TSMC's foundry market share reached 70%+ in Q2 2025 (TrendForce data). It produces nearly all of the world's most advanced chips including Apple's iPhones, AMD processors, and NVIDIA AI chips.

Phase 3: Assembly, Testing, Marking and Packaging (ATMP/OSAT)

After fabrication, chips are cut from wafers, packaged, tested, and marked. This phase is more labour-intensive and less capital-intensive than fabrication:

• Southeast Asia dominant: Malaysia, Thailand, Vietnam, the Philippines
• India is entering this phase through the ISM scheme

The 2020–21 Global Chip Shortage

The global chip shortage (2020–21) exposed the fragility of the semiconductor supply chain:

Causes:

1. COVID-19 disruptions: Factory shutdowns in Malaysia, Philippines (ATMP facilities); logistics disruption
2. Demand surge: Remote work (laptops, webcams), gaming consoles (PS5, Xbox), smartphones — all semiconductor-heavy
3. Automotive sector under-ordering: Auto companies cancelled chip orders during COVID-19 (expecting demand drop); then demand recovered faster than expected
4. Geographic concentration: Over-dependence on Taiwan (TSMC) and South Korea (Samsung) for advanced chips
5. Geopolitical tensions: US-China trade war had already begun restricting flows

Consequences:

• Automotive production: Global auto production fell by ~7.7 million vehicles in 2021 due to chip shortage (AlixPartners estimate)
• Consumer electronics shortages; inflation
• Estimated $500 billion+ economic loss globally in 2021

This crisis made every major economy realise the need for domestic semiconductor capacity.

US-China Technology War

The US-China semiconductor competition is the central technology-geopolitical struggle of the 21st century.

US Actions

China's Response

• "Big Fund" (National IC Industry Investment Fund): Massive state investments in domestic chip companies (SMIC, YMTC, CXMT)
• SMIC achieved 7nm node (reportedly) despite restrictions, using older DUV lithography equipment
• China retaliating: export controls on gallium (2023), germanium (2023), graphite (2023), and additional minerals (2024–25) — essential for chip manufacturing

EU Chips Act (2023)

The European Chips Act (entered into force September 2023) committed €43 billion to build European semiconductor capacity. Goal: increase EU's global chip market share from ~9% to 20% by 2030.

TSMC Dresden — ESMC (European Semiconductor Manufacturing Company): Joint venture between TSMC + Infineon + NXP + Bosch (10% each); total project cost >$10 billion; EU state aid: €5 billion (largest single EU Chips Act award). Structural build complete; equipment installation planned 2H 2026; production start: 2027; node: 28nm/22nm/16–12nm (automotive and industrial grade). The 2030 target of 20% global share faces pressure as flagship projects lag original schedules.

India Semiconductor Mission (ISM)

Background

India launched the India Semiconductor Mission (ISM) in December 2021 under the Ministry of Electronics and Information Technology (MeitY). The total incentive outlay: ₹76,000 crore.

Rationale:

• India's semiconductor imports grew to ~$6.5 billion (2021–22) and rising rapidly
• Electronics is one of India's largest import bills (alongside oil and gold)
• India has a large chip design talent pool but no fabrication capacity
• Geopolitical imperative: reduce dependence on Taiwan (under China threat) and South Korea

Approved Projects Under ISM

1. Tata Electronics-PSMC Fab — Dholera, Gujarat

2. Micron Technology — Sanand, Gujarat (ATMP)

3. CG Power-Renesas Electronics — Sanand, Gujarat (ATMP)

4. Kaynes Semicon — Sanand, Gujarat (ATMP)

By May 2026, 12 semiconductor manufacturing projects had been approved under ISM, with cumulative investment commitments of approximately ₹1.64 lakh crore across six states. A fifth project — TSAT (Tata Semiconductor Assembly and Test) in Jagiroad, Morigaon, Assam (₹27,000 crore; groundbreaking 3 August 2024; capacity: 48 million chips/day at full ramp; Phase 1 commissioned April 2026 — India's first chip packaging operations in Northeast India) — is India's largest OSAT facility. Two additional projects were approved by the Cabinet in May 2026: Crystal Matrix Ltd (GaN compound semiconductor/Mini-LED fab, Dholera) and Suchi Semicon Pvt Ltd (OSAT, Surat) — combined investment ₹3,936 crore.

OSAT vs Fab — India's Current Position

This is a critical distinction for UPSC:

India is currently in the ATMP/OSAT phase — the downstream, less capital-intensive part of the value chain. The Tata-PSMC fab (28nm) is India's first move into fabrication, but it is not at the leading edge (TSMC's current best: 2nm).

India as a Chip Design Hub

While India lacks fab capacity, it is already a major force in chip design:

• India is home to approximately ~20% of the world's semiconductor design engineers (3,000–4,000 chip designers out of a global talent pool of ~20,000)
• Major design centres in India: Qualcomm (Hyderabad — largest R&D outside USA), Intel (Bengaluru), ARM (Bengaluru), Broadcom, Texas Instruments, Analog Devices, Nvidia
• Applied Materials and Lam Research (major chip equipment companies) have significant operations in India focused on manufacturing support and precision components
• India's semiconductor design exports are significant; the country aims to become the world's leading chip design hub

VLSI design ecosystem: India's engineering universities (IITs, NITs) produce large numbers of VLSI (Very Large Scale Integration) engineers. Companies like Wipro, Infosys, and HCL have semiconductor design practices.

iCET → TRUST — India-USA Semiconductor Cooperation

The Initiative on Critical and Emerging Technologies (iCET) was launched at a Modi-Biden summit in May 2022 (Tokyo) and formally activated in January 2023 (NSA Ajit Doval and NSA Jake Sullivan).

Semiconductor-specific achievements under iCET:

• MOU on Semiconductor Supply Chain Resiliency (March 2023): US Commerce Secretary Raimondo and India Commerce Minister Goyal signed to establish a collaborative mechanism
• Micron's Sanand facility was a direct outcome of iCET-level discussions
• Lam Research announced plans to expand India operations for precision components
• Minerals Security Partnership (MSP): India joined this US-led initiative to secure critical mineral supply chains for semiconductors

iCET upgraded to TRUST (February 2025): During PM Modi's Washington visit on 13 February 2025, President Trump and PM Modi announced TRUST — Transforming the Relationship Utilizing Strategic Technology — as the successor and upgrade to iCET. Semiconductors remain a core pillar of TRUST; the initiative also covers critical minerals, biotechnology, AI infrastructure, energy, and space. Alongside TRUST, major US tech investment announcements were made: Microsoft ($3.7 billion in Telangana), Amazon ($12.7 billion in cloud infrastructure, by 2030), and Google ($6 billion/1GW data centre in Visakhapatnam).

India's strategy: use TRUST to attract US chip companies to India, gain access to cutting-edge technology, and integrate into the US-led semiconductor supply chain as China is excluded.

Critical Minerals for Semiconductors

Chips require specialised materials that are geographically concentrated:

China's export control escalation against semiconductor supply chains:

• 2023: Gallium, germanium, and graphite (general semiconductor/materials controls)
• 4 April 2025 (MOFCOM Order No. 18): Seven medium/heavy REEs — terbium, dysprosium, samarium, gadolinium, lutetium, scandium, yttrium — plus rare-earth permanent magnets; case-by-case export licensing; direct impact on fab equipment motors, EUV/DUV photolithography processes, ion implantation, and CMP slurries; China controls ~70% of REE mining and ~90% of processing globally

These controls directly targeted the semiconductor supply chains of the USA, Japan, South Korea, Taiwan, and EU.

India Semiconductor Mission 2.0

ISM 2.0 was announced in Union Budget 2026-27 (presented 1 February 2026) with:

• Total outlay: ₹40,000 crore (full multi-year mission envelope, including Electronics Component Manufacturing Scheme)
• FY 2026-27 budget provision: ₹1,000 crore

Focus areas:

• Compound semiconductors — Silicon Carbide (SiC) and Gallium Nitride (GaN) for EV power electronics and 5G
• Semiconductor equipment and materials manufacturing in India
• Advanced packaging — chiplets and heterogeneous integration
• Full-stack Indian semiconductor IP through Design Linked Incentive (DLI) scheme
• Targets India's semiconductor market to reach $103.4 billion by 2030 (IESA Vision Document, January 2025; ~13% CAGR)

Previous Year Questions (PYQs)

Prelims

1. Consider the following statements about semiconductors: (UPSC CSE pattern)

   1. Silicon is the most commonly used semiconductor material
   2. Transistors are the fundamental building blocks of semiconductor chips
   3. Semiconductor fabrication requires cleanroom conditions with extreme precision
   • All three statements are correct

2. The India Semiconductor Mission (ISM) was launched in:

   • December 2021, with an outlay of ₹76,000 crore

3. With reference to the CHIPS and Science Act (2022) of the USA, which of the following is correct?

   • It provides approximately $52 billion in direct subsidies for domestic semiconductor manufacturing

4. The term "OSAT" in semiconductor context refers to:

   • Outsourced Semiconductor Assembly and Test

Mains

1. The global semiconductor industry is highly concentrated in a few countries. Examine the vulnerabilities this creates for India and critically evaluate India's Semiconductor Mission as a strategic response. (GS3 — 15 marks)

2. "The US-China technology war over semiconductors has profound implications for global supply chains and India's strategic options." Discuss with reference to the CHIPS Act, iCET, and India's semiconductor policy. (GS2/GS3 — 15 marks)

3. Distinguish between semiconductor fabrication and ATMP/OSAT operations. Where does India currently stand in the global semiconductor value chain, and what are the challenges in moving to advanced fabrication? (GS3 — 10 marks)

4. Critical minerals like gallium, germanium, and rare earth elements are essential for semiconductor manufacturing. How does China's dominance in these minerals affect global chip supply chains? What is India's strategy to address this vulnerability? (GS3 — 15 marks)

Cross-paper relevance

• GS3 — Science-Technology (primary) — Semiconductors: India Semiconductor Mission (12 projects, ₹1.64 lakh crore, May 2026), Tata-PSMC fab at Dholera (28 nm, ₹91,000 crore, Tata-ASML MOU May 2026), CG Power OSAT, Micron Sanand (commercial production Feb 2026), TSAT Assam (Phase 1 April 2026)
• GS3 — Economy — Industrial policy: PLI for semiconductors (₹76,000 crore), critical mineral supply chains (gallium, germanium), design ecosystem
• GS2 — International Relations — Geopolitics: US-China chip war, Taiwan risk (TSMC concentration), Chip 4 Alliance, India as alternative manufacturing hub
• Essay — Recurring theme: "Semiconductors: the new oil of the 21st century" (2023); "India's journey from software to hardware" (2022)

Recent Developments (2024–2026)

Tata-PSMC Fab Dholera — Ground-Breaking March 2024

Cabinet approved India's first semiconductor fabrication plant on 29 February 2024; PM Modi performed the bhumi pujan at Dholera, Gujarat on 13 March 2024. The plant — a joint venture between Tata Electronics and Taiwan's Powerchip Semiconductor Manufacturing Corporation (PSMC) — will manufacture 28nm chips for consumer electronics, automotive, telecom, and defence. Total investment: ₹91,000 crore (~$10.9 billion); India's largest greenfield semiconductor investment.

Civil construction is approximately 50% complete as of May 2026. Foundation redesign was required after soil tests revealed soft clay and high-salt-content ground unsuitable for the vibration-sensitive cleanroom design — a technical challenge that delayed the construction schedule. On 16 May 2026, Tata Electronics and ASML (Netherlands — world's only manufacturer of EUV lithography machines) signed an MOU to support the Dholera fab, signed in the presence of PM Narendra Modi during his official visit to the Netherlands. ASML will provide advanced lithography tools and ramp-up support. Target for first chip: end-2026 (trial production).

Alongside the Dholera fab, the Cabinet also approved Tata Semiconductor Assembly and Test (TSAT) in Jagiroad, Morigaon district, Assam (₹27,000 crore; groundbreaking: 3 August 2024; designed capacity: 48 million chips/day — India's largest OSAT facility; Phase 1 commissioned April 2026 — India's first semiconductor chip packaging in Northeast India; ~25,000 total employment impact).

UPSC angle: Tata-PSMC Dholera fab (₹91,000 crore, 28nm, bhumi pujan 13 March 2024); TSAT Morigaon, Assam (₹27,000 crore, 48 million chips/day); Micron ATMP Sanand (commercial production 26 February 2026) — all high-probability Prelims 2027 data points.

India Semiconductor Mission — From ISM 1.0 to ISM 2.0

ISM 1.0 (December 2021): Total outlay ₹76,000 crore; Ministry of Electronics & IT (MeitY); subsidy structure: 50% project cost for fabs, 30% for OSAT/ATMP. By May 2026, 12 semiconductor projects approved (10 by December 2025 + 2 approved May 2026) with cumulative investment commitments of ~₹1.64 lakh crore across six states. Projects include: Tata-PSMC Dholera fab, TSAT Morigaon Assam, Micron ATMP Sanand, CG Power-Renesas ATMP Sanand, Kaynes Semicon Sanand, Crystal Matrix (GaN/Mini-LED, Dholera), Suchi Semicon (OSAT, Surat), and others.

ISM 2.0 (Union Budget 2026-27, announced 1 February 2026): Total outlay ₹40,000 crore (multi-year); FY 2026-27 budget provision ₹1,000 crore. Shifts focus from attracting FDI to building indigenous IP capability: compound semiconductors (GaN, SiC), advanced packaging (chiplets, heterogeneous integration), semiconductor equipment/materials manufacturing in India, full-stack Indian semiconductor design.

India's semiconductor market projected to reach $103.4 billion by 2030 (~13% CAGR; IESA Vision Document, January 2025). Largest demand segments: wireless communications, consumer goods, automotive.

UPSC angle: ISM 1.0 outlay (₹76,000 crore), ISM 2.0 (₹40,000 crore total; ₹1,000 crore FY26-27), 10 approved projects, the shift from FDI attraction to indigenous IP, and India's comparative advantage (design talent vs fab capacity gap) are Mains GS-3 themes.

Semiconductor Chip Design Ecosystem — 25,000 Engineers 2024

Chip design — as distinct from chip manufacturing — is already a significant Indian strength. India houses over 25,000 VLSI (Very Large Scale Integration) chip design engineers and is home to R&D centres of Intel, Texas Instruments, Qualcomm, and over 200 global semiconductor companies. Bengaluru, Hyderabad, Pune, and Noida are the primary chip design hubs.

The DLI (Design Linked Incentive) Scheme under ISM incentivises Indian startups and companies to design semiconductor chips, offering up to 30% product design reimbursement and 50% deployment subsidy. By 2024, 13 companies received DLI approval for chip designs in areas including server processors, AI accelerators, power management ICs, and safety-critical automotive chips. InCore Semiconductors (RISC-V processor for IoT) and Mindgrove Technologies (system-on-chip for automotive) are notable DLI beneficiaries.

UPSC angle: DLI scheme, India's chip design strength (25,000+ engineers), RISC-V architecture, and InCore/Mindgrove as domestic design companies are Mains GS-3 content.

Micron Sanand — India's First Commercial Semiconductor Facility (February 2026)

Micron Technology's ATMP facility in Sanand, Gujarat was inaugurated by PM Modi and commenced commercial production on 26 February 2026 — India's first operational semiconductor facility producing chips at commercial scale. The facility packages DRAM and NAND flash memory/storage chips from wafers supplied by Micron's global network; products serve consumer electronics and data storage markets.

UPSC angle: Micron commercial production (26 February 2026, Sanand, Gujarat) — landmark milestone in India's semiconductor journey — Prelims 2027 data point.

iCET Upgraded to TRUST — February 2025

During PM Modi's official visit to Washington on 13 February 2025, President Trump and PM Modi announced TRUST (Transforming the Relationship Utilizing Strategic Technology) — the successor and upgrade to iCET (Initiative on Critical and Emerging Technologies). Semiconductors, critical minerals, AI infrastructure, biotechnology, energy, and space are TRUST's core pillars. US tech investment announcements alongside TRUST: Microsoft ($3.7 billion, Telangana), Amazon ($12.7 billion cloud infra by 2030), Google ($6 billion/1 GW data centre, Visakhapatnam).

UPSC angle: iCET (launched May 2022, Modi-Biden, Tokyo) → upgraded to TRUST (13 February 2025, Modi-Trump, Washington); semiconductor supply chain cooperation explicitly carried forward. Prelims 2027: distinguish iCET (2022–24) from TRUST (2025–).

US Chip Export Controls — 2025 Escalation

The US tightened semiconductor export controls through 2025. Biden's January 2025 final rule created three-tier country categorisation for AI chip exports. Trump administration revoked the H20 export licence (April 2025) — NVIDIA's China-compliant chip — causing Nvidia to announce ~$5.5 billion in inventory writedowns. US CHIPS Act implementation: TSMC Arizona Fab 1 (4nm) in volume production since late 2024; TSMC Arizona total planned investment expanded to $165 billion (2025 announcement); CHIPS Act award to TSMC: $6.6 billion (finalised); Intel: $7.86 billion award (finalised November 2025), but Intel Foundry reported ~$2.4 billion operating loss in 2024 with Ohio fab delayed to 2030.

UPSC angle: US chip export controls are a recurring GS3 theme — link to US-China tech war, India as alternative manufacturing hub, and semiconductor supply chain resilience.

Exam Strategy

For Prelims:

• ISM 1.0 launched: December 2021; outlay: ₹76,000 crore; ministry: MeitY
• ISM 2.0: Union Budget 2026-27; total outlay: ₹40,000 crore; FY26-27 provision: ₹1,000 crore
• ISM approved projects: 12 projects (May 2026); cumulative investment: ₹1.64 lakh crore across 6 states
• Tata-PSMC fab: Dholera, Gujarat; 28nm; ₹91,000 crore; bhumi pujan 13 March 2024
• TSAT: Morigaon, Assam; ₹27,000 crore; groundbreaking 3 August 2024; 48 million chips/day; Phase 1 commissioned April 2026
• Micron facility: Sanand, Gujarat; ATMP; $2.75 billion; commercial production 26 February 2026
• TSMC foundry market share: ~64% (2024); 70%+ (Q2 2025); headquarters: Taiwan
• CHIPS Act (USA): $52 billion direct subsidies; passed 2022; TSMC Arizona CHIPS award: $6.6 billion
• EU Chips Act: €43 billion; force September 2023; TSMC Dresden (ESMC): production start 2027
• iCET launched: May 2022 (Tokyo); formally activated January 2023; upgraded to TRUST: 13 February 2025
• India semiconductor market 2030 projection: $103.4 billion (IESA, January 2025)
• India has ~20% of global chip designers (~25,000 VLSI engineers)

For Mains:

• Structure semiconductor answers as: global supply chain geography → geopolitical risks → India's vulnerabilities → ISM response → challenges ahead
• Key distinction: India is in ATMP (downstream) phase — not yet in leading-edge fabrication; Tata-PSMC is 28nm, not 2nm/3nm
• Always link ISM to: (1) import substitution (reduce electronics import bill); (2) export ambition; (3) geopolitical alignment (US-India tech partnership)
• Critical minerals → semiconductor connection: gallium, germanium, neon gas, palladium — test this linkage
• For essay/long answers: use the design → fabrication → packaging value chain structure consistently

Key Distinctions:

• Fabless companies (Qualcomm, Nvidia) vs Foundries (TSMC, Samsung) vs IDMs (Intel: both design + fab)
• Fab (chip manufacture) vs ATMP/OSAT (chip packaging/testing)
• 28nm (mature) vs 3nm/2nm (leading edge) — India currently targeting 28nm
• ISM (2021) vs ISM 2.0 (2026 focus) — compound semiconductors and advanced nodes

Key Terms

Semiconductor Fabrication (Fab)

• Definition: Semiconductor fabrication ("fab") is the multi-step, ultra-clean manufacturing process by which integrated circuits (chips) are built up layer by layer on a thin slice of pure silicon (a "wafer") using techniques such as photolithography, etching, deposition and ion implantation. A "fab" also refers to the highly capital-intensive facility (fabrication plant) where this is carried out.
• Context: Chips are the foundational hardware of modern electronics, defence systems, AI, automobiles and telecommunications, making semiconductor manufacturing a strategic and geopolitical priority. Production is heavily concentrated: Taiwan's TSMC alone held about 72% of the global pure-foundry market (as of Q3 2025), and Taiwan accounts for over 90% of the world's most advanced logic-chip capacity. India meets roughly 90-95% of its chip demand through imports, prompting the launch of the India Semiconductor Mission (ISM) in 2021 with a ₹76,000 crore outlay to build a domestic ecosystem.
• UPSC Relevance: This is a high-yield GS3 topic under science & technology and the economy (indigenisation, "Atmanirbhar Bharat", import substitution). Prelims can test factual recall of the India Semiconductor Mission outlay (₹76,000 crore, 2021), the up-to-50% fiscal support for fabs, the distinction between a fab and ATMP/OSAT (assembly-testing-packaging), and the first Made-in-India processor VIKRAM3201 (ISRO-SCL). Mains questions typically frame it around strategic autonomy, supply-chain resilience, the global chip race and India's locational/skill challenges. Foundational concept — underpins questions on critical technologies, supply-chain security and high-tech manufacturing.